When he announced the Power Mac G5, Steve Jobs promised 3.0 GHz within a year, based on promises from IBM that were never fulfilled. That meant the new Power Macs had 800 MHz to 1.0 GHz data buses, a far cry from the 133 and 167 MHz buses used in later G4 Power Macs. The PPC 970 has a 512 KB Level 2 (L2) cache and uses a system bus running at half of the CPU’s core speed in the Power Mac G5. IBM announced the PowerPC 970 in October 2003, and it was used in the first Power Mac G5 models (1.6 and 1.8 GHz single-processor and 2.0 GHz dual-processor), which were introduced in June 2003. The computer had a total of nine cooling fans to control temperatures. As CPUs designed for servers, low power consumption was not one of IBM’s goals, so the G5 Power Macs all needed very sophisticated cooling systems to deal with the heat the PowerPC 970 created.

The first G5 CPU, the PowerPC 970, built on everything IBM had learned in producing its POWER4 CPU for servers. One works on integer and floating point operations, the second handles permute operations. Or, more precisely, two partial AltiVec units.

The G5 CPU has two arithmetic logic units (ALUs), two double-precision floating point units, two load/store units, and two AltiVec units. The G5 has separate 32-bit read and write double data rate (DDR) data buses. This gives the G5 much faster access to system memory. Where the PowerPC G4 used much slower memory on a 100, 133, or 167 MHz data bus, the G5 accesses system memory at one-half or, at worst, one-third of CPU speed. IBM was the only manufacturer of G5 CPUs. Only three different versions of the chip were produced before Apple made the move to Intel CPUs in 2006. It was first used when the Power Mac G5 was introduced in June 2003. The G5 is a 64-bit member of the PowerPC processor family that is fully compatible with 32-bit code.

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